hc27.hotchips.orgHot Chips: A Symposium on High Performance Chips | Conference Sponsor IEEE Technical Committee on

Microprocessors and Microcomputers. Hot Chips: A Symposium on High Performance Chips Conference Sponsor IEEE Technical Committee on Microprocessors and Microcomputers. Search About HC27 (2015) Flint Center, Cupertino, CA, Sunday-Tuesday, August 23-25, 2015. Full Program Zipfile (130MB) [accordion] [tabs] [tab title=”At A Glance”] Sunday 8/23: Tutorials 8:00 AM – 9:00 AM: Breakfast 9:00 AM – 12:15 PM: Deep Learning 12:15 PM – 1:30 PM: Lunch 1:30 PM – 5:35 PM: Makers from Hobbyists to Professionals 5:45 PM – 7:00 PM: Wine and Cheese Reception Monday 8/24: Conference Day 1 8:15 AM – 9:15 PM: Breakfast 9:15 AM – 11:00 AM: IoT 11:30 AM – 12:30 PM: Keynote 1: 12:30 PM – 1:45 PM: Lunch 1:45 PM – 3:45 PM: Multimedia and Signal Processing 4:15 PM – 6:15 PM: HPC and Cloud 6:15 PM – 7:15 PM: Reception Tuesday 8/25: Conference Day 2 7:30 AM – 8:30 AM: Breakfast 8:30 AM – 10:00 AM: FPGAs 10:30 AM – 12:00 PM: GPUs 12:00 PM – 1:15 PM: Lunch 1:15 PM – 2:15 PM: Keynote 2: 5G 2:45 PM – 4:15 PM: Applications 4:45 PM – 6:45 PM: Processors 6:45 PM – 7:00 PM: Closing Remarks [/tab] [tab title=”Tutorials”] Tutorials Sun 8/23 Tutorial Title Presenter Affiliation 8:00 AM Breakfast 9:00 AM Deep Learning Architectures, algorithms and applications Roland Memisevic University of Montreal [spoiler title=” Abstract: ]Deep Learning is the current, and third, wave of wide-spread scientific interest in neural networks in the last 60 years. It is based on the insight that complex data processing tasks, like recognizing objects in images, translating text between languages, or controlling robots, can be best addressed with systems that are (i) adaptive, and (ii) serial in the sense that they use multiple stages of non-linear processing.The first, adaptivity, makes it possible to train rather than program the system with example data. This is the core idea behind machine learning, and it allows us to solve tasks that would be too hard to solve by hand. The second, deep, multi-layered processing, refers to the idea of composing highly nonlinear, complex systems from relatively simple, serially executed building blocks. This makes it possible to re-use computations and exploit invariances, that abound in most natural data.In all common Deep Learning models, the computational building blocks are simple, naturally parallel computations (such as matrix multiplications). This gives neural networks the benefit of being able to very easily exploit parallelism. Consequently, it has been the use of GPUs that made these models work well on real-world problems, and that re-ignited widespread interest in neural networks around 2012. Deep neural networks running on fast parallel hardware currently yield the state-of-the-art, and in some cases better-than-human, performance in tasks that have been considered too hard for computers to solve just a few years ago. These include visual object recognition, action recognition in videos, (fully automated) machine translation, speech recognition, speech synthesis, control.In this tutorial, I will outline some of the core principles behind in Deep Learning, and I will describe the kinds of architectures, learning algorithms, and low-level computations used in commonly deployed models. I will also talk about computational tricks and common software frameworks used in the area, and I will describe current challenges and research directions. [/spoiler] 10:30 AM Break 10:45 AM Deep Learning Common software tools, research questions, outlook Roland Memisevic University of Montreal 12:15 PM Lunch 1:30 PM Makers from Hobbyists to Professionals Welcome Christopher Nitta UC Davis [spoiler title=” Abstract: ] In recent years, there has been an explosion of inexpensive, power efficient microcontrollers that year after year have increased in performance while integrating more peripherals. The marker’s community has rapidly adopted these products and integrated them into projects ranging from wearable LED costumes to quadcopter controllers with surveillance. This tutorial will explore the trends of makers from both the hobbyist’s and the professional’s perspective and how these network connected devices fit into the Internet of Things. Biography: Christopher Nitta is an adjunct professor at UC Davis. Christopher’s current research focus is on computer architecture, but in a previous life” he dedicated his time to designing and implementing the embedded control systems of plug-in hybrid-electric vehicles, fuel cells, and wind turbines.[/spoiler] 1:40 PM Maker Trends: The Path of Least Resistance Peter Dokter SparkFun [spoiler title=” Abstract: ] New tech moves fast in the maker community. From RF solutions to sensing applications to microcontrollers, beginners and experts alike are pushing the limits for fun and profit. What are the trends? I’ll cover the most popular parts from SparkFun’s perspective, along with examples of products and projects that we’ve seen in the last few years. Biography: Pete Dokter is a serial hobbyist now spinning that habit into interesting projects for SparkFun electronics, where he wrangles cats (engineers) as the Director of Engineering. Pete’s also the host of the According to Pete” video series, where he explains electrical engineering concepts on the internet.[/spoiler] 2:35 PM IoT Device Development Challenges and Solutions Venkat Mattela and Sailaja Dharani Redpine Signals [spoiler title=” Abstract: ] Internet of Things (IoT) phrase is as prevalent as the word Wi-Fi® today and it is expected to go through the same evolution in awareness for mass market adoption. Wireless communication is the key part of the encompassing components of any IoT device. Wireless connectivity enhances the device utility at the expense of ease of use and deployment challenges. Additionally, realizing the perceived market size of multi-billion devices IoT space requires security solution at all levels at an attractive price point. This presentation provides insights into rapid IoT device development beyond hobbyists. Biography: Mr. Mattela has over 30 years of engineering and management experience in the semiconductor industry. Prior to joining Redpine, Mr. Mattela was at Network Media Platforms Group of Analog Devices as Director and was responsible for the product, strategy and business development for media wireless connectivity solutions (WLAN, WMAN). Prior to joining ADI, Mr. Mattela was at Infineon Technologies as Director and was responsible for micro-architecture and design of TriCore MCU-DSP processor. Mr. Mattela started his career at Tata Institute of Fundamental Research, India in January 1983 and held various engineering positions at LSI Logic, LMSI and CMC Ltd. Mr. Mattela has a Master’s Degree in Computer Sciences from Jawaharlal Nehru Technological University, India and holds 11 US patents. Ms. Dharani has started her professional career at Redpine signals and has 13 years of engineering experience in wireless space. At Redpine Signals Ms. Dharani is responsible for system design covering all levels of development including developing silicon integration technologies. She has developed highly optimized embedded platforms using Redpine chipsets. Ms. Dharani received gold medal for her academic excellence in Bachelor’s Degree in Electronics and Communications Engineering from Jawaharlal Nehru Technological University, India and holds 13 US patents. [/spoiler] 3:30 PM Break 3:45 PM Makers (cont) Implementing Software Defined Radio on the Parallella Andreas Olofsson Adapteva [spoiler title=” Abstract: ] This tutorial will present the Parallella single board computer in detail and show how the board can be used for embedded computing. The Parallella is a $99 credit card sized heterogeneous computing platform that includes a dual core Zynq SOC and a 16 core Epiphany DSP coprocessor. The project was launched on Kickstarter in 2012 and today has over 10,000 developers and 200 Universities. The tutorial will show how to download and run programs on...